1. Field of the Invention
The present invention relates to improvement of a series type regulated power supply circuit and an emitter follower type power amplifying circuit. The present invention, more detailedly, relates to a circuit for reducing power consumption of a regulated power supply circuit, a leak current breaking circuit for breaking leak current between input and output terminals in a regulated power supply circuit and a protecting circuit for an output transistor in an emitter follower type power amplifying circuit.
2. Description of the Prior Art
In order to prevent an output transistor from being broken down by over-load or short-circuit at the output terminal, a series type regulated power supply circuit as well as an emitter follower output type amplifying circuit, typically, includes an output current limiting circuit or a circuit for limiting power consumption of an output transistor. Now, with reference to drawings, the prior art and the problems thereof in the regulated power supply circuit and emitter follower output type amplifying circuit will be hereinafter described in that order.
FIG. 1 is a circuit diagram showing a prior art example of a three-terminal regulated power supply circuit and FIG. 2 is a circuit diagram showing a prior art example of a regulated power supply circuit of dual input voltage configuration that is modified from the three-terminal regulated power supply circuit.
The conventional three-terminal regulated power supply circuit includes, as shown in FIG. 1, a series regulating transistor Q11; a reference voltage generating circuit having transistors Q4 through Q8 for generating a reference voltage; an output voltage detecting circuit made up of output voltage dividing resistors R10 and R11; an error amplifying circuit having transistors Q1, Q2, Q3 and Q10; a drop voltage detecting circuit of a Zener diode DZ and a resistor R9; and a current limiting circuit of resistors R6, R7 and R8 and a transistor Q12.
In the three-terminal regulated power supply circuit having the above arrangement, the series regulating transistor regulates the voltage drop between the collector and emitter thereof to keep the output voltage constant independently of input voltage variations and load variations. The reference voltage generating circuit generates a reference voltage stable against change in operation temperature and supplies the voltage to the error amplifying circuit. The output voltage detecting circuit detects a voltage divided from the output voltage and supplies the voltage to the error amplifying circuit. The error amplifying circuit compares the divided voltage value of output voltage with the reference voltage value and regulates the series regulating transistor so as to cancel out variations in the output voltage. The drop voltage detecting circuit detects the voltage drop between the collector and emitter of the series regulating transistor to deliver the information to the current limiting circuit. The current limiting circuit detects the emitter current of the series regulating transistor and limits the base current of the series regulating transistor based on the detected result and the collector-emitter voltage drop.
As to the series regulating transistor Q11, the collector is connected to an input terminal 1, the emitter is connected to an output terminal 2 via the resistor R8 and the base is connected to the emitter of the transistor Q10. The output current detecting resistor R8 is disposed between the emitter of the series regulating transistor Q11 and the output terminal 2 to detect the emitter current of the series regulating transistor Q11 (.apprxeq. output current).
A series of resistors R6 and R7 is provided between the base and emitter of the series regulating transistor Q11. A junction S between the resistors R6 and R7 is connected to the base of the transistor Q12.
In the reference voltage generating circuit, the transistor Q4 has its base and collector connected therefore functions as a diode, and a reference voltage is generated between the collector of the transistor Q4 and a ground terminal 3. The thus generated reference voltage is supplied to the emitter of the transistor Q3 serving as an input stage of the error amplifying circuit.
An output voltage V.sub.O is divided by the resistors R10 and R11 in the output voltage detecting circuit so as to present an output-proportional voltage, V.sub.O x {R11/(R10+R11)} at a junction point P between the resistors R10 and R11. The junction point P is connected to the base of the transistor Q3 as the input stage of the error amplifying circuit. The emitter of the transistor Q10 serving as an output stage of the error amplifier is connected to the base of the series regulating transistor Q11.
The Zener diode DZ as an component of the drop voltage detecting circuit is connected at its cathode to an input terminal 1 and the anode thereof is connected to one end of the resistor R9. The other end of the resistor R9 is connected to the base of the transistor Q12 in the current limiting circuit. The collector of the transistor Q12 is connected to both the base of the transistor Q10 and the collector of the transistor Q2. The transistor Q12 is constructed such as to limit the base current of the series regulating transistor Q11. That is, the resistor R12 is provided between the base and emitter of the series regulating transistor Q11. In this example, the transistors Q10 and Q11 form a Darlington connection.
The aforementioned current limiting circuit reduces the base current of the series regulating transistor Q11 when the transistor is short-circuited by load or over-loaded and therefore likely to deviate from its safe operating area. This reduction of the base current protects the series regulating transistor Q11 from being damaged or degraded.
In an operating state of the regulated power supply circuit in FIG. 1, with an input voltage V.sub.IN, an output voltage V.sub.0 and an output current I.sub.0, the following relations (1) and (2) hold. EQU V.sub.IN N=V.sub.O +R.sub.8 .times.I.sub.O +V.sub.CBQ11 ( 1) EQU V.sub.IN =V.sub.0 +R.sub.8 .times.I.sub.O +V.sub.BBQ11 +V.sub.BBQ10 +V.sub.CBQ2 +V.sub.R2 ( 2)
where R.sub.8 denotes a resistance value of the resistor R8, V.sub.CBQ2 and V.sub.CBQ11 represent collector-emitter voltages of Q2 and Q11, respectively. V.sub.BBQ11 and V.sub.BBQ10 represent base-emitter voltages of Q11 and Q10, respectively. V.sub.R2 indicates a voltage drop across the resistor R2.
In the above Eq.(2), if R.sub.8 =0.2.OMEGA. and output current I.sub.O =1A, it is necessary to set up the normal input voltage V.sub.IN to suffice a relation V.sub.IN .gtoreq.V.sub.O +2.5V in order to allow the transistors Q11, Q10 and Q2 to operate within their respective active regions. Accordingly, the power consumption P.sub.Q11 of the series regulating transistor Q11 is represented by the following expression (3). EQU P.sub.Q11 =(V.sub.IN -V.sub.O).times.I.sub.0 ( 3)
In Eq. (3), if V.sub.IN -V.sub.O =2.5V and I.sub.O =1A, P.sub.Q11 becomes 2.5W or more (i.e., P.sub.Q11 .gtoreq.2.5W), so that it is impossible to make the power consumption of the series regulating transistor Q11 smaller than that level.
In contrast to this, it is known in the dual input voltage configuration that a point A in the circuit in FIG. 1 is cut off so that the circuitry on the left side relative to the point A is supplied by a separate power supply, bias voltage V.sub.B as shown in FIG. 2. Also in this case, the same relation between the input voltage V.sub.IN and the output voltage V.sub.O as in the above Eq.(1) holds, but Eq.(2) should be replaced by the following equation (4). EQU V.sub.B =V.sub.O +R.sub.8 .times.I.sub.O +V.sub.BBQ11 +V.sub.BBQ11 +V.sub.CBQ2 +V.sub.R2 ( 4)
In this case, the bias voltage V.sub.B, sufficing a relation V.sub.B .gtoreq.V.sub.O +2.5V that is equivalent to the previous relation for V.sub.IN, supplies power to transistors Q2, Q10 and Q12 to be operated. In this configuration, suppose that, in the above Eq.(1), R.sub.8 =0.2.OMEGA., output current I.sub.O =1A and collector-emitter voltage V.sub.CBQ11 of the series regulating transistor Q11 suffices V.sub.CBQ11 .gtoreq.0.2V, the following relation (5) holds: EQU V.sub.IN -V.sub.O .gtoreq.0.2.times.1+0.2=0.4V (5)
Accordingly, from the Eq.(3), a power consumption P.sub.Q11 by the series regulating transistor Q11 suffice the following relation (6): EQU V.sub.Q11 .gtoreq.0.4.times.1=0.4W (6)
Therefore, it is possible for the configuration shown in FIG. 2 to reduce the power consumption as compared to the configuration shown in FIG. 1.
Meanwhile, in the regulated power supply circuits shown FIGS. 1 and 2, the current limiting circuit limits emitter current of the series regulating transistor Q11 when the drop voltage (V.sub.IN -V.sub.O) is likely to exceed a predetermined level or when output current I.sub.O (I.sub.0 .apprxeq.emitter current of Q11) is apt to exceed a predetermined level, whereby breakdowns of the series regulating transistor and load circuit will be protected.
Initially, in the drop voltage detecting circuit, the following relation (7) holds: EQU V.sub.in -V.sub.O =D.sub.DZ +I.sub.1 .times.R.sub.9 +V.sub.BBQ12,(7)
where V.sub.IN -V.sub.O is a drop voltage between input and output terminals, V.sub.DC is a Zener voltage of the Zener diode DZ, I.sub.1 is a current through the Zener diode DZ, and V.sub.BBQ12 is a threshold voltage between the base and emitter of the transistor Q12.
As is apparent from Eq.(7), I.sub.1 starts to flow when the drop voltage (V.sub.IN-V.sub.O) exceeds V.sub.DZ +V.sub.BBQ12. This causes the transistor Q12 to become active, base current of the transistor Q10 reduces by the equivalent of collector current of the transistor Q12. As a result, emitter current of the series regulating transistor Q11 or output current I.sub.O lowers so that the power consumption of the series regulating transistor Q11 is suppressed.
Next, with regard to the output current limiting value defined by the output current limiting circuit, from the fact that the voltage drop across the resistor R8 due to output current I.sub.O plus the voltage to be applied across the resistor R7 by dividing the base-emitter voltage of the series regulating transistor Q11 by the resistors R6 and R7 is equal to the base-emitter voltage of the transistor Q12, the following equation (8) holds when a peak output current is designated by lop: EQU V.sub.BBQ12 =V.sub.BBQ11 .times.{R.sub.7 /(R.sub.6 +R.sub.7)}+I.sub.OP +R.sub.8 ( 8)
where V.sub.BBQ12, V.sub.BBQ11 are base-emitter voltages for transistors Q12 and Q11, respectively, and R.sub.6, R.sub.7 and R.sub.8 are resistance values for R6, R7 and R8, respectively.
For instance, assuming that V.sub.BBQ12 =0.7V, V.sub.BBQ11 =0.7V, R.sub.6 =600.OMEGA., R.sub.7 =400.OMEGA., and R.sub.8 =0.2.OMEGA., I.sub.OP becomes equal to 2.1A(I.sub.OF =2.1A). That is, the peak value of the output current can be limited up to 2.1A, no output current in excess of this level arises, whereby the series regulating transistor Q11 may be protected from being broken down or deteriorated.
In the conventional regulated power supply circuit described heretofore, for the purpose of further reducing V.sub.IN -V.sub.O value in which the circuit can be operated, it is necessary to lower the value of resistor R8. However, in order to lower the value of resistor R8 with peak output current I.sub.OP being kept constant, the ratio between resistance values of resistors R6 and R7 must be varied as could be understood from Eq.(8). In order to sharply reduce the value of the resistor R8, suppose that R8=0.05.OMEGA., R6=150.OMEGA., R7=850.OMEGA., the following relation holds from Eq.(8): EQU 0.7=0.7.times.850/(150+850)+I.sub.OP .times.0.05 (9)
Therefore, I.sub.OP =2.1(A).
In this case, if only the base-emitter voltage V.sub.BBQ11 of the transistor Q11 is on and even if I.sub.O is small or near to zero, the base-emitter voltage V.sub.BBQ12 =0.7.times.850/(1000)+0.apprxeq.0.595V or the transistor Q12 goes into its operative state. A further elevation of the junction temperature will cause the transistor Q12 to be activated with a still lower output current I.sub.O. In this way, the conventional over-current limiting circuit would became activated despite that the output current of the power supply falls in the normal range, thereby degrading the load change ratio Reg-L characteristic, and the like.
On the other hand, as to the regulated power supply circuit of dual power voltage type shown in FIG. 2 above, it is possible to cut off the emitter current of the transistor Q10 by making the bias voltage V.sub.B equal to 0V with the input voltage V.sub.IN being kept applied. Therefore, it is possible to turn the output voltage V.sub.O on and off by controlling V.sub.B.
However, in the arrangement of the conventional regulated power supply circuit shown in FIG. 2, when the bias voltage V.sub.B is set equal to 0V, that is, even in a case where no current is supplied between the base and collector of the transistor Q10, a leak current due to the input voltage V.sub.IN flows from the input terminal 1 to the output terminal 2 by way of the Zener diode DZ, resistors R9, R7 and R8. Accordingly, even if the bias voltage was made equal to 0V in order to try to shut down voltage supply to the load, application of a greater input voltage than the Zener voltage V.sub.DZ to the input terminal 1 would generate an output voltage V.sub.O at the output terminal 2, causing a leak current to flow, defectively.
Next, a conventional example of an emitter follower output type amplifying circuit is shown in FIG. 3.
The conventional emitter follower output type amplifying circuit includes: as shown in FIG. 3, a differential amplifier consisting of transistors Q21 to Q24, resistors R21, R22 and a constant-current circuit IA; and an output circuit consisting of an output transistor Q25, transistors Q26, Q27, resistors R23, R24 and a constant-current circuit IB. Here, transistors Q26, Q27 and resistors R23, R24 constitute an output current limiting circuit. Reference numerals 21 and 22 respectively designate input terminals to which differential input signals are input. Reference numerals 23 and 24 designate an output terminal and a power input terminal to which a power voltage V.sub.CC is supplied.
The conventional emitter follower output type amplifying circuit as configurated above operates as follows. That is, the transistors Q21 and Q22, are both connected at their emitters to the common current source IA, and connected at their bases with input terminals 21 and 22, respectively, forming a differential amplifier. Input signals V.sub.1 and V.sub.2 are supplied to the input terminals 21 and 22, respectively and in response to the voltage difference between the input signals V.sub.1 and V.sub.2, collector voltage of the transistor Q22 varies. The collector of the transistor Q22 is connected to the base of the output transistor Q25, which in turn outputs an impedance-transformed output voltage V.sub.3 from its emitter.
If the output terminal 23 that is connected to the emitter of the output transistor Q25 is connected to a low-impedance and therefore to be lowered in potential, so as to be short-circuited to the ground, the collector current I.sub.25 flows through the output transistor Q25 h.sub.PE -times as great as the base current I.sub.b through the same transistor Q.sub.25. In the configuration in which the collector of the transistor Q25 is directly connected to the power supply V.sub.CC, the current I.sub.25 is unlimited when the aforementioned short-circuit is made, to causing a certain danger of breaking down the transistor Q25.
To deal with this, the conventional emitter follower output circuit includes a current limiting circuit composed of a transistors Q26, Q27, resistors R23, R24 and makes the circuit control the collector current through the transistor Q25.
In this conventional current limiting circuit, the resistor R23 is a resistor for detecting collector current (I.sub.25) through the output transistor Q25, and the transistor that is biased by the resistor R24 is a transistor for limiting current. The transistor Q26 is for detecting current and the resistor R23 is connected between the base and emitter of the transistor Q26. This transistor Q26 is activated when the voltage drop across the resistor R23 exceeds a threshold of the base-emitter voltage thereof, and absorbs the bias current that flows through R24. This causes the base current through the transistor Q27 to decrease to thereby prevent the collector current of the transistor Q27 from increasing. Thus, the emitter current of the output transistor Q25 is limited.
A current limiting value I.sub.25LIM can be shown by the following expression (10), EQU I.sub.25LIM .apprxeq.V.sub.BBQ26 /R.sub.23 ( 10)
where V.sub.BBQ26 denotes the voltage between base and emitter of the transistor Q26 and R.sub.23 indicates a resistance value of the resistor R23.
Nevertheless, in the thus constructed conventional emitter follower output current limiting circuit shown in FIG. 3 above, the current limiting circuit itself brings about a considerably large voltage drop, disadvantageously, so that it is impossible to raise the output voltage V.sub.3.
More specifically, in the circuit configuration in FIG. 3, a high-level V.sub.3H of the output voltage V.sub.3 is shown by an expression (11) as follows: EQU V.sub.3H =V.sub.CC -(V.sub.R24 +V.sub.BBQ26 +V.sub.BBQ27 +V.sub.CBQ25)(11)
where V.sub.R24 is a voltage drop across the resistor R24, V.sub.BBQ26, V.sub.BBQ27 are base-emitter voltages of transistors Q26 and Q27, respectively, and V.sub.CBQ25 is a collector-emitter voltage of the transistor Q25. Suppose that V.sub.R24 =0.2V, V.sub.BBQ26=V.sub.BBQ27 =0.7V and V.sub.CBQ25 =0.2V, a maximum V.sub.3Hmax of the output voltage V.sub.3 can be written as the following expression (12). EQU V.sub.3Hmax =V.sub.CC -1.8V (12)
That is, this configuration would suffer from a problem that it is impossible to raise the high-level output voltage V.sub.3H more than the this value.